HI,
Greetings for the day
We have urgent job opening for below position. Job description copied below kindly look at the job description and reverts back with your updated resume.
Role: ASIC Verification Engineer
Experience Level: 3 - 5 years
Location: Santa Clara, CA
ESSENTIAL DUTIES AND RESPONSIBILITIES:
Main Responsibilities:
· Help architect test bench for full chip and block level verification of next generation cellular product(s).
· Architect and Develop verification environment using the state-of-the-art verification Methodology and practices like VMM, OVM, UVM
· Development will be done System Verilog
· Develop test plans, execute and track progress
Desired Qualifications:
· Self Motivated, Team Player that can work with various groups
· Ability to multi-task various verification activities.
· BS in Electrical Engineering required, prefer MS Electrical Engineering or Computer Science
· 4+ years in ASIC verification. Experience in building Verification environments using System Verilog, VMM/OVM/UVM
· Past experience in Low-power verification is a huge plus
· Experience building verification environment using Constraint Random, System Verilog Assertions
· Strong knowledge of ARM processor and it’s integration, AXI, APB, DMA, DDR[2] controllers
· Familiar with peripheral devices like I2C, SDIO, USB, SDRAM, USIM, MIPI interface
· Prior experience in verifying OFDM[A]/DMT based systems, digital modems, GSM/GPS/CDMA, Ethernet Physical Layer or other communication systems would be helpful but not required
· Knowledge of Shell scripting, Perl, and Makefiles
Need hands-on Verification engineer, developing verification methodologies and test bench for testing of cellular products as part of the team developing Next Generation of Broadband Cellular Products.
Thanks & Regards
Hemanth M
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Resource Specialist
SYSTEL INC | Atlanta, GA
Office: +1-678-250-9879
Toll Free: +1-888-8SYSTEL (879-7835) x 321
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