Hi Binh,
It was nice talking to you. As discussed, we would like to present your candidature for the below role with our customer, HCL America on $50 W2 + Benefits. Appreciate if you could confirm the same to proceed further.
Position: ASIC Design/Verification Engineer
Duration: 12+ months, extendable
Levels: Intermediate / Senior
Location I: San Jose / Santa Clara, CA
Location II: Boise, ID
Location III: Longmont, CO
Description:
Around 4 to 7 years of demonstrable industrial experience ASIC/SoC verification experience. FPGA verification also can be considered
Must be very well-versed with hands-on Verilog coding, testbenches.
Experience with SystemVerilog verification (OVM or UVM) methodology
Scripting languages, e.g. – Perl, Tcl, Python or Shell scripting
Thanks & Regards
Vineetha Nath
__________________
Sr. Resourcing Specialist
SYSTEL INC | Atlanta, GA
A certified (MBE) Minority Business Enterprise
Office: 678-250-9864
Email: vineethat@systelinc.com;vineethat@systelcomputers.com
www.linkedin.com/pub/vineetha-pillai/29/224/6b5/
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Hello,
Attached is my resume and response.
Complete Name: Binh Tran
Work Authorization/ Visa Status: US citizen
Availability: 2 to-3 weeks
Current Location: Maryland
Willing to Relocate: Yes
Best Time to reach: 301-770-3389, any time
Hourly Rate Expectation: Last rate $65/ an hour W2 plus per diem, and negotiate with client side.
Skype ID: TBD later
Last four digit SSN#: 2454
Reason for Change of employment: New contract assignment
Hello,
Very Good Morning! Hope you are doing well!
We have the below job opportunity. Please find the details below and revert with your updated resume and the below requested details. Please ignore if this is not a match or if in case you are not interested.
Position: ASIC Design/Verification Engineer
Duration: 12+ months, extendable
Levels: Intermediate / Senior
Location I: San Jose / Santa Clara, CA
Location II: Boise, ID
Location III: Longmont, CO
Description:
Around 4 to 7 years of demonstrable industrial experience ASIC/SoC verification experience. FPGA verification also can be considered
Must be very well-versed with hands-on Verilog coding, testbenches.
Experience with SystemVerilog verification (OVM or UVM) methodology
Scripting languages, e.g. – Perl, Tcl, Python or Shell scripting
Please do fill the below Details:
Complete Name:
Work Authorization/ Visa Status:
Availability:
Current Location:
Willing to Relocate:
Best Time to reach:
Hourly Rate Expectation:
Skype ID:
Last four digit SSN#:
Reason for Change of employment:
Thanks & Regards
Vineetha Nath
Office: 678-250-9864
Confidentiality Notice: This e-mail message, including any attachments, is for the sole use of the intended recipient(s) and may contain confidential and/or privileged information. Any unauthorized review, use, disclosure or distribution is prohibited. If you are not the intended recipient, please contact the sender by reply e-mail and destroy all copies of the original message. To stop receiving mails in the future please contact us
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